Reenigne blog

I recently built myself a new computer using an Intel Core i7 920 CPU. This CPU has more pins (well, “lands” actually, since they are just flat conducting areas that touch pins in the socket) than any other yet produced, 1366 of them to be precise. I was wondering why so many were needed, so I grabbed the datasheet and made a map:

Power:
     V_SS
     V_CC
     V_CCPLL
     V_TTA
     V_TTD
     V_DDQ

Memory:
     DDR0 data      other
     DDR1 data      other
     DDR2 data      other

Other:
     QPI data      other
     Other
     reserved

Idle speculation follows (I don’t have any background in CPU or motherboard design):

The pins roughly divide into six sections: two for memory data, one for other memory-related signals, one for power, one for the QPI bus and one that is mostly reserved.

That there are a lot of power pins is not surprising – this CPU can use as much as 145A of current, which is enough to vaporize any one of those tiny connections, so it has to be spread out amongst ~300 of them for each of power and ground. Having two very big pins for power would probably make the mechanical engineering of the CPU much more difficult and would push the responsibility for branching out that power onto the CPU, whereas it is better done by the motherboard.

It’s interesting that the ground lands are mostly spread out but the power lands are mostly together. I’m not sure why that should be – I would expect them both to be spread out. Perhaps the 8 or 9 big groups of V_CC on the north edge each correspond to a single “power line” on the motherboard (and hence are grouped together) while the distributed ground lands are needed to supply electrons for the signal lands.

Three DDR3 channels also use a lot of lands – 192 for data alone and almost as many again for addresses, strobes and clocks.

Another thing that surprised me is that there are so many reserved lands (~250 of them). Initially I thought that this was because the socket was designed before the designers knew how many pins they would actually need, so they made sure to design for the absolute maximum. However, a good chunk of the reserved lands are used by the Xeon 5500 CPUs, which use the same socket – in particular for memory error detection/correction and the second QPI bus (which is presumably in the northwest corner).

This entry was posted on Wednesday, October 28th, 2009 at 4:00 pm and is filed under computer. You can follow any responses to this entry through the RSS 2.0 feed. You can leave a response, or trackback from your own site.